21 Nov 2023 - 18:30 | 21 Nov 2023

Auditorium 1

An introduction to satellite communications will be provided, along with the identification of trends in the area. Additionally, speakers will present their knowledge and experience in developing a satellite downlink transmitter. The system is compatible with the Cubesat standard and was designed to offer high-performance transmission on a C-band channel. In the first part, the system assumptions will be specified. Next, the main components to be placed on a customized PCB will be described. Subsequently, the HDL code development process for the main on-board device (Zynq SoC) will be presented, which is used for digital signal processing and has a moderately sized FPGA section. In this part, timing failures and limitations of fixed-point representation will be presented. The last part of the conference will be dedicated to some theoretical aspects of digital transmission. The fundamentals of bit-coded modulation (BICM), which has become standard in many wireless systems and can be an ambitious solution for satellite communication, will be presented. An iterative decoder and other improvements to BICM will be presented, which can greatly reduce the bit error rate without any increase in signal power.


Register for this event